Announced the UFS 3.1 standard that will allow in the future to have faster and faster smartphone memory: here's what changes
A few days ago the JEDEC, that is the Joint Electron Device Engineering Council, has made official the release of the UFS 3.1 standard for ROM memories of electronic devices. And this is great news for those who are planning to buy a new top of the range smartphone in 2020.
The new standard, in fact, brings with it several interesting changes to the previous UFS 3.0, without changing it. The new standard, in fact, brings with it several interesting changes to the previous UFS 3.0 standard, without disrupting it. We can talk about evolution rather than revolution, but it is an excellent evolution that will positively impact both on the performance of memories and, above all, on their consumption. And a memory that consumes less, in a smartphone, means only one thing: more autonomy, with the same performance and storage space. Since this is an evolution and not a revolution, then, integrating UFS 3.1 memories on smartphones (and any other electronic device) will not be difficult because the 3.1 standard is very similar to the previous 3.0.
UFS 3.1 memories: the three main advantages
The UFS 3.1 standard has three new features and three main advantages over 3.0: the "Write Booster", the "DeepSleep" and the "Performance Throttling Notification". The Write Booster is an SLC (Single Level Cell) cache that increases the read speed (which, however, does not increase by much: 23.2 Gbps). DeepSleep is a new ultra low power mode for energy saving: it's the real news, the one that will save battery on smartphones. Performance Throttling Notification is a mechanism that lets the device integrating UFS 3.1 memories know when the performance of the memories has been slowed down due to overheating of the chips. This last feature will allow better memory management, avoiding overheating of the whole device and, consequently, more stable performance.
UFS 3.1: the Host Performance Booster
With the UFS 3.1 standard also comes the so-called Host Performance Booster (HPB) Extension. This feature provides an option to cache the address map of the UFS device in the system's DRAM. For UFS devices with a large density, using the system DRAM provides a larger and faster cache thus improving the read performance of the device. We will see the benefits of this extension in the future when the memories built into smartphones are even larger than they are today.